1. Field of the Invention
The invention relates to a semiconductor process of forming a metal gate structure with different threshold voltages and a semiconductor device thereof, and more specifically to a semiconductor process of forming a metal gate structure with different threshold voltages by applying stacked work function layers and performing different threshold voltage implantation processes, and a semiconductor device thereof.
2. Description of the Prior Art
Poly-silicon is conventionally used as a gate electrode in semiconductor devices, such as the metal-oxide-semiconductor (MOS). With the trend towards scaling down the size of semiconductor devices, however, conventional poly-silicon gates face problems such as inferior performance due to boron penetration and unavoidable depletion effect. This increases equivalent thickness of the gate dielectric layer, reduces gate capacitance, and worsens a driving force of the devices. Therefore, work function metals that are suitable for use as the high-k gate dielectric layer are used to replace the conventional poly-silicon gate to be the control electrode.
Typically, threshold voltage in conventional planar metal gate transistors is adjusted by the means of ion implantation. With the trend in the industry being towards scaling down the size of the metal oxide semiconductor transistors (MOS), three-dimensional or non-planar transistor technology, such as fin field effect transistor technology (finFET) has been developed to replace planar MOS transistors. Nevertheless, threshold voltages in current finFETs cannot be easily adjusted by using ion implantation. Hence, how to resolve this issue in today's finFET architecture has become an important task in this field.